In addition to a memory cell array, a nonvolatile memory, such as a flash memory, includes a reference cell array used at the time of performing various tests.
For example, in order to verify at erase test time whether or not a memory cell to which an erase pulse is applied is in an erased state, an electric current which flows along a bit line to which the memory cell is connected is compared with an electric current which flows along a bit line to which a reference cell for erase verify is connected. For example, if an electric current which flows along the bit line to which the memory cell is connected is stronger than an electric current which flows along the bit line to which the reference cell is connected, then a verification result is “Pass”. That is to say, the determination that erase is correctly performed is made.
Japanese Laid-open Patent Publication No. 2006-114154
Japanese National Publication of International Patent Publication No. 09-502823
However, a non-selected memory cell is also connected to a bit line to which a memory cell selected at verification time is connected. When erase verify is performed, a correct verification result may not be obtained because of a leakage current which flows through the non-selected memory cell. For example, an electric current which flows through a memory cell, which is an object of verification, may be weaker than an electric current which flows through a reference cell. However, a leakage current which flows through a non-selected memory cell also flows along a bit line. As a result, an entire electric current may exceed the electric current which flows through the reference cell, and the erroneous determination that a verification result is “Pass” may be made. One of reasons for this may be that a reference cell array is smaller than a memory cell array, that the number of reference cells connected to one bit line is smaller than that of memory cells connected to one bit line, and that a leakage current which flows along a bit line to which a reference cell is connected is weaker than a leakage current which flows along a bit line to which a selected memory cell is connected.